A technique called error check and correct (ECC) is a conventional method for lowering the error rate of semi-conductor memory, such as NAND-type flash memory. ECC is a technique in which a memory controller adds error correction code to data when the data is written to the semi-conductor memory, whereby errors are corrected by the error correction code when the data is read.
Related prior techniques includes, for example, a technique such that when data is written to a flash memory, the data is encoded, the number of specific numerical values in the encoded data is reduced to be smaller than the number of specific numerical values before the encoding, and then the encoded data is written to a memory cell of the flash memory. Another related technique is a technique in which information is converted from information of a first data format into information of a second data format using statistical values related to the first data format and the information is stored to memory together with an identifier for identifying a conversion value used for conversion to the second data format.
Still another related technique is a technique in which data is written to random access memory, is converted into data in which the number of bits having a prescribed value is greater than or equal to a prescribed number and the converted data is output to the random access memory. Still another related technique is a technique such that among n kinds of write_data created by rearranging write_data in burst transmission, write_data having less data switching at data writing to memory than data switching before the rearrangement in burst transmission is selected and the order of the selected write_data in burst transmission is encoded in a redundant bit.
For examples of the conventional techniques above, refer to Published Japanese-Translations of PCT Application, Publication Nos. 2010-528380 and 2005-537551, and Japanese Laid-Open Patent Publication Nos. 2002-366419 and 2008-059449.
As the semi-conductor memory comes to have a microfabricated structure or multivalued configuration, the error rate of the semi-conductor memory increases. As a result, error correction using conventional techniques, such as ECC, has become difficult. For example, a higher error rate of the semi-conductor memory results in an increase in the number of bits of the error correction code used in ECC, thus leading to increased circuit scale of the memory controller and a larger required memory capacity of the semi-conductor memory.